Arif Abdul Mannan, Koichi Tanno, Hiroki Tamura, Takako Toyama, Agung Darmawansyah
In this paper, a novel voltage-mode MVL inverter is proposed. The proposed inverter consists of two circuit blocks: MVL threshold comparator and Multi-level generator, which can be implemented by standard CMOS technologies. Next, the inverted MVL hysteresis comparator is also proposed as the application of the proposed MVL inverter. The proposed MVL inverter and inverted MVL hysteresis comparator are expandable, capable to use more numbers of levels in MVL circuits. The performances of all proposed MVL circuits were evaluated through HSPICE with the set of 0.18μm CMOS process parameters. From the simulation results, we could confirm that all proposed MVL circuits work well as theory. © 2013 IEEE.
Department of Electrical and Electronic Engineering, University of Miyazaki, Miyazaki, Japan; Department of Electrical Engineering, University of Brawijaya, Malang, Indonesia
